Nvidia has announced a new roadmap for its GPU families at the GTC conference and it appears to have carried out some major surgery.
Pascal, Nvidia's latest GPU architecture, is being introduced in between Maxwell and Volta. It has absorbed old Maxwell's unified virtual memory support and old Volta's on-package DRAM, integrating those feature additions into a single new product. We always thought that Pascal was a rubbish name for a GPU, after all, who wants a chip which breaks because you forgot to put a semi-colon in the middle of a nest.
Volta was supposed to follow Maxwell in 2014. Volta's marquee feature would be on-package DRAM, using Through Silicon Vias (TSVs) to die stack memory and place it on the same package as the GPU.
What appears to have changed is Nvidia's definition of Maxwell and Volta. Maxwell has lost its promised unified virtual memory feature which will now be under the bonnet of the chips after Maxwell. All users can hope for from Maxwell will get is the software based unified memory feature being rolled out in CUDA 6.
Nvidia is not telling anyone about its second generation Maxwell GPUs and how those might be integrated into professional products.
Maxwell's best feature will be DirectX 12 support and will ship in 2014 as scheduled.
Meanwhile Volta has been pushed back and stripped of most of what people will find interesting, Its on-package DRAM will be promoted to the GPU before Volta, and while the name Volta still exists, all anything knows about the chip is that will come after the 2016 GPU.
Nvidia has not said anything else directly about the unified memory plans that Pascal has inherited from old Maxwell. Pascal will get NVLink which is an attempt to supplant PCI-Express with a faster interconnect bus.
Nvidia thinks that the 16GB/sec made available by PCI-Express 3.0 is not enough when compared to the 250GB/sec+ of memory bandwidth available within a single card. PCIe 4.0 will bring higher bandwidth yet but Nvidia wants to push its own bus to achieve the kind of bandwidth it wants.
According to the roadmap, the result is a bus that looks a whole heck of a lot like PCIe but uses tighter requirements and a true point-to-point design. NVLink uses differential signalling, with the smallest unit of connectivity being a "block."
A block contains eight lanes, each rated for 20Gbps, for a combined bandwidth of 20GB/sec. In terms of transfers per second this puts NVLink at roughly 20 gigatransfers/second, as compared to an already staggering 8GT/sec for PCIe 3.0.
Nvidia has knocked up a Pascal prototype and it will be put on a motherboard parallel to the board with each Pascal card connected to the board through the NVLink mezzanine connector. This allows GPUs to be cooled with CPU-style cooling methods in a server rack.